1. Field of the Invention
The present invention relates to a fault detection circuit in a loop network, more particularly to a fault detection circuit in a loop network which can easily identify a faulty node in a short time.
2. Description of the Related Art
In a loop connection utilizing an FCAL (Fiber Channel Arbitrated Loop: ANSI standard), all nodes are connected on a single line in closed loop shape. Thus, since a fault in a node affects all subsequent nodes, determination of which node is a true faulty node requires analysis of fault histories of all nodes, which is very difficult to achieve and takes a long time.
In view of the aforementioned problem in the prior art, it is an object of the present invention to provide a fault detection circuit in a loop network which can easily identify a faulty node in a short time.
To solve the problem, a fault detection circuit in a loop network according to the present invention having plurality of nodes including a host control unit connected on a single line in a closed loop is characterized in that each node is connected at its input terminal to an electro-optic (hereinafter referred to as E/O) conversion circuit for converting an electrical input signal to an optical signal, connected at its output terminal to an opto-electric (hereinafter referred to as O/E) conversion circuit for converting an optical signal to an electrical output signal, and connected to a selecting circuit for selecting either an electrical input signal to an E/O conversion circuit or an electrical output signal from an O/E conversion signal.
Additionally, the fault detection circuit in a loop network is characterized in that it has a first comparison input circuit for receiving one of a plurality of electrical input signals for comparison, a second comparison input circuit for receiving different one of the electrical input signals from the one received by the first comparison input circuit, a comparison circuit for comparing output signals from the two comparison input circuits in synchronization, and a fault detection circuit for determination based on the comparison result of the comparison circuit.
The present invention has an effect that a faulty node can be easily identified in a short time with an instruction from the host control unit connected to the loop network. Additionally, the present invention has an effect that an intermittent fault can be also easily identified.